zbMATH — the first resource for mathematics

Fault-tolerance VLSI sorters. (English) Zbl 0653.68049
68P10 Searching and sorting
94C10 Switching theory, application of Boolean algebra; Boolean functions (MSC2010)
68Q25 Analysis of algorithms and problem complexity
Full Text: DOI
[1] R. Aubusson and I. Catt, Wafer-scale integration–A fault-tolerant procedure,IEEE J. Solid-State Circuits,13, 339–344, 1978. · doi:10.1109/JSSC.1978.1051050
[2] S. A. Browning, The tree machine: a highly concurrent computing environment, Ph.D thesis, Department of Computer Science, California Institute of Technology, 1980.
[3] D. S. Fussell and P. J. Varman, Fault-tolerant wafer-scale architectures for VLSI,Proceedings of the Ninth Annual IEEE/ACM Symposium on Computer Architecture, Austin, TX, pp. 190–198, 1982.
[4] J. W. Greene and A. Gamal, Configuration of VLSI arrays in the presence of defects,J. Assoc. Comput. Mach,31, 694–717, 1984. · Zbl 0632.94033
[5] L. J. Guibas and F. M. Liang, Systolic stacks, queues and counters,Proceedings of the MIT Conference on Advanced Research in VLSI, Cambridge, MA, 1980.
[6] K. S. Hedlund, Wafer-scale integration of parallel processors, Ph.D. thesis, Department of Computer Science, Purdue University, 1982.
[7] K. S. Hedlund and L. Snyder, Wafer-scale integration of configurable, highly parallel (CHiP) processors,Proceedings of the International Conference on Parallel Processing, Bellaire, MI, pp. 262–264, 1982.
[8] I. Koren, A reconfigurable and fault-tolerant VLSI multiprocessor array,Proceedings of the Eighth Annual IEEE /ACM Symposium on Computer Architecture, pp. 425–442, 1981.
[9] H. T. Kung and M. Lam, Wafer-scale integration and two-level pipelined implementations of systolic arrays,Proceedings of the MIT Conference on Advanced Research in VLSI, Cambridge, MA, 1984.
[10] H. T. Kung and C. E. Leiserson, Systolic arrays (for VLSI),Sparse Matrix Proceedings 1978, SIAM, pp. 256–282, 1979. · Zbl 0404.68037
[11] F. T. Leighton and C. E. Leiserson, Wafer-scale integration of systolic arrays,Proceedings of the 23rd Annual Symposium on Foundations of Computer Science, pp. 297–311, 1982. · Zbl 0558.94020
[12] C. E. Leiserson, Systolic priority queues,Proceedings of the Caltech Conference on VLSI, Pasadena, CA, pp. 199–214, 1979.
[13] F. Manning, An approach to highly integrated computer-maintained cellular arrays,IEEE Trans. Comput.,32, 536–552, 1977. · Zbl 05337471 · doi:10.1109/TC.1977.1674879
[14] C. A. Mead and L. A. Conway,Introduction to VLSI Systems, Addison-Wesley, Reading, MA, 1980.
[15] D. Nath, S. N. Maheshwari, and P. C. P. Bhatt, Efficient VLSI networks for parallel processing based on orthogonal trees,IEEE Trans. Comput.,32, 569–581, 1983. · Zbl 0514.68029 · doi:10.1109/TC.1983.1676279
[16] F. P. Preparata and J. E. Vuillemin, The cube-connected-cycles: A versatile network for parallel computation,Proceedings of the 20th Annual Conference on Foundations of Computer Science, Puerto Rico, pp. 140–147, 1979.
[17] J. I. Raffel, On the use of nonvolatile programming links for restructurable VLSI,Proceedings of Caltech Conference on VLSI, Pasadena, CA, pp. 95–104, 1979.
[18] A. Rosenberg, The Diogenes approach to testable fault-tolerant networks of processors,IEEE Trans. Comput.,32, 902–910, 1983. · Zbl 05338745 · doi:10.1109/TC.1983.1676134
[19] L. Snyder, Introduction to the configurable highly parallel computer,IEEE Comput.,15, 47–64, 1982.
[20] H. S. Stone, Parallel processing with the perfect shuffle,IEEE Trans. Comput.,20, 153–161, 1971. · Zbl 0214.42703 · doi:10.1109/T-C.1971.223205
[21] C. D. Thompson, The VLSI complexity of sorting,IEEE Trans. Comput.,32, 1171–1184, 1983. · Zbl 0524.68025 · doi:10.1109/TC.1983.1676178
[22] P. J. Varman, Wafer-scale integration of linear processor arrays, Ph.D dissertation, The University of Texas at Austin, 1983.
[23] P. J. Varman and D. S. Fussell, Design of robust systolic algorithms,Proceedings of the 1983 International Conference on Parallel Processing, Bellaire, MI, 1983.
This reference list is based on information provided by the publisher or from digital mathematics libraries. Its items are heuristically matched to zbMATH identifiers and may contain data conversion errors. It attempts to reflect the references listed in the original paper as accurately as possible without claiming the completeness or perfect precision of the matching.