Bilardi, Gianfranco; Chaudhuri, Shiva; Dubhashi, Devdatt; Mehlhorn, K. A lower bound for area-universal graphs. (English) Zbl 0942.68643 Inf. Process. Lett. 51, No. 2, 101-105 (1994). Cited in 1 Document MSC: 68R10 Graph theory (including graph drawing) in computer science 68Q25 Analysis of algorithms and problem complexity 68W10 Parallel algorithms in computer science PDFBibTeX XMLCite \textit{G. Bilardi} et al., Inf. Process. Lett. 51, No. 2, 101--105 (1994; Zbl 0942.68643) Full Text: DOI Link References: [1] Ajtai, M.: Recursive constructions of 3-regular expanders. Focs, 295-304 (1987) [2] Bay, P. E.; Bilardi, G.: An area-universal VLSI circuit. Proc. 1993 symp. On integrated systems (March 1993) [3] Bhatt, S. N.; Leighton, F. T.: A framework for solving VLSI graph layout problems. J. comput. System sci. 28, 300-343 (1984) · Zbl 0543.68052 [4] Lengauer, Th.: VLSI theory. Handbook of theoretical computer science (1990) · Zbl 0900.68269 [5] Thompson, C. D.: A complexity theory for VLSI. Ph.d. dissertation (1980) This reference list is based on information provided by the publisher or from digital mathematics libraries. Its items are heuristically matched to zbMATH identifiers and may contain data conversion errors. In some cases that data have been complemented/enhanced by data from zbMATH Open. This attempts to reflect the references listed in the original paper as accurately as possible without claiming completeness or a perfect matching.